Computer Science 281
Computer Organization

Denison




Week Day Topics Reading
Due
HW / Project
Due
1 Computer Systems
1/18
to
1/22
M Overview of Computer Systems
Syllabus
W Continue Introduction and life cycle
PH 1.1-1.3, 1.5, 1.6

R Lab 1: Logisim Basics
PH C.1-C.2

F Life Cycle of add; System Components    
2  
1/25
to
1/29
M No class -- MLK Observance    
W Performance; start MARS if time
PH 1.4, 1.8, 1.9
Homework 1 (due at class time)
R Lab 2: Breadboard Basics    
F Intro to MARS and Assembly Language PH 2.1-2.3, B.9-B.10 HW Sec 3 (due at class time)
3  
2/1
to
2/5
M Assembly Language/Machine Instructions PH 2.5  
W Base Systems (bin, hex, other) PH 2.4, Handout  
R Lab 3: Karnaugh Maps    
F C/C++ to Machine: ascii, unsigned/signed integers; intro 2's complement   Homework 2 (due at class time)
4  
2/8
to
2/12
M Two's complement, add/sub in fixed rep.; assembly lang comparisons and jumps PH 3.1, 3.2 Asm from HW2
W Pseudo-instr; sign extension; basic branches PH 2.6, 2.7  
R Lab 4: Broadboard Adder Circuit    
F Logicals and loops   Homework 3 exercises
5  
2/15
to
2/19
M Logicals, instruction encoding, and questions   Homework 3 asm
W Functions I PH 2.8
R Lab 5: Multiplexor Generalizations  
F Functions II PH 2.9-2.11  
6  
2/22
to
2/26
M Functions III Example asm
W Midterm1    
R Lab 6: Mystery Circuits    
F No class; Michael Starbird Lecture(s) PH 2.13 MIPS Simulator Phase I (due at midnight)
7  
3/1
to
3/5
M Multiplication PH 3.3  
W Division PH 3.4  
R Lab 7: Finite State Machines    
F FSM completion; Floating Point intro PH 3.5 PH Chapter 3 HW on mult /div
8  
3/8
to
3/12
M Floating Point continued PH 3.6 - 3.9  
W Floating Point Addition and Multiplication   MIPS Simulator Phase II
R Lab 8: Garage Door Opener    
F Lab8 completion   PH Chapter 3 HW on float
Spring Break, March 13 to 21
9  
3/22
to
3/26
M Intro Datapath and Control, single cycle    
W Single Cycle datapath/control design PH 4.1-4.3  
R Lab 9: ALU Project Start    
F Wrap-up Single Cycle PH 4.4  
10  
3/29
to
4/2
M Lab Day for ALU and Phase III    
W Multi-cycle control and Datapath   MIPS Simulator Phase III (11:59pm)
R Lab 10: Single Cycle CPU Project    
F Multi-cycle control and Datapath Lecture Slides
MIPS ALU (11:59pm)
11  
4/5
to
4/9
M Pipelining I -- Introduction and Datapath
   
W Pipelining II -- Structural and Data Hazards    
R Lab 11: Multicycle CPU Project Lecture Slides  
F Pipelining III -- Control Hazards PH 4.5 - 4.8 Single Cycle CPU
12  
4/12
to
4/16
M Memory Hierarchy PH 5.1  
W Midterm2    
R Lab Day: Continuing on Multicycle CPU    
F Direct Mapped Caches PH 5.2
Lecture Slides
Multicycle CPU
13  
4/19
to
4/23
M Course Evals (till 8:50); Continuing with Caches PH 5.2  
W Cache Performance PH 5.3  
R Optional lab time on Second chance MIPS Test Files  
F Set-Associative Caching Lecture Slides Second chance MIPS simulator
14  
4/26
to
4/30
M Virtual Memory I PH 5.4
Lecture Slides
 
W Virtual Memory II    
R No class    
F Virtual Memory III   Final HW on Caches
5/3 M Review and Final Test Topics    



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